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high linearity broadband sp2t 5mhz to 10ghz f2972 datasheet ? 2017 integrated device technology, inc . 1 rev o april 19 , 2017 description the f2972 is a singlepole doublethrow (sp2t) reflective rf switch featuring high linearity and wide bandwidth. this dev ice is optimized from 5mhz to 1.8ghz to support downstream cable modem future migration for docsis 3.1 applications, and op erates at up to 10ghz to support a multitude of wireless rf appli cations. superb performance is achieved when used in either 50 o r 75 terminating impedance applications. the f2972 uses a single positive supply voltage of either +3 .3v or +5.0v and is compatible with either 1.8v or 3.3v control logic. competitive advantage the f2972 provides extremely low insertion loss across the entire bandwidth while providing superb distortion performance. optimized for docsis 3.1 applications up to 1.8ghz optimized for wifi applications up to 5.9ghz low insertion loss high isolation fast switching no external matching required typical applications broadband cable docsis 3.0 / 3.1 set top box catv filter bank switching wifi cellular bts general purpose general features supply voltage: +2.5v to +5.25v 1.8v and 3.3v compatible control logic 2mm x 2mm, 12pin tqfn package features (75) low insertion loss: 0.23db at 204mhz 0.34db at 1.8ghz high isolation: 40db at 1.8ghz p0.1db compression of +37dbm at 204mhz second harmonic: 100dbc at 204mhz third harmonic: 120dbc at 204mhz composite second order distortion > 100dbc composite triple beat distortion > 100dbc features (50) low insertion loss: 0.40db at 2.4ghz 0.55db at 8ghz high isolation: 34db at 2.4ghz high linearity: iip2 +125dbm at 2.4ghz iip3 +77dbm at 2.4ghz p0.1db compression of +40dbm at 2.4ghz second harmonic: 100dbc at 2.4ghz third harmonic: 110dbc at 2.4ghz block diagram figure 1. block diagram
f2972 datasheet ? 2017 integrated device technology, inc . 2 rev o april 19 , 2017 pin assignments figure 2. pin assignments for 2mm x 2mm x 0.5mm 12pin tqfn, neg12 C top view en gnd v cc rf2 gnd rf1 gnd f2972 gnd rfc gnd v ct l gnd 12 3 4 5 6 98 7 12 11 10 ep pin descriptions table 1. pin descriptions number name description 1 gnd internally grounded. connect pin directly to paddle ground or as close as p ossible to pin with thru vias. 2 rf c rf common port. if this pin is not 0 v dc, then an external coupling capacitor must be used. 3 gnd internally grounded. connect pin directly to paddle ground or as close as p ossible to pin with thru vias. 4 gnd internally grounded. connect pin directly to paddle ground or as close as possible to pin with thr u vias. 5 rf1 rf1 port. if this pin is not 0 v dc, then an external coupling capacitor must be used. 6 gnd internally grounded. connect pin directly to paddle ground or as close as p ossible to pin wi th thru vias. 7 v ctl logic control pin. 8 en active high enable pin. if low, neither rf1 nor rf2 are connected to rfc . pin is internally p ulled up to 2.5v through a 500k resistor. 9 v cc power supply. bypass to gnd with capacitors shown in the typical a pplication circuit as close as possible to pin. 10 gnd internally grounded. connect pin directly to paddle ground or as close as p ossible to pin with thru vias. 11 rf2 rf2 port. if this pin is not 0 v dc, then an external coupling capacitor must be used. 12 gnd internally grounded. connect pin directly to paddle ground or as close as p ossible to pin with thru vias. ep exposed pad. internally connected to gnd. solder this exposed pad to a pcb pad that uses multiple ground vias to provide heat transfer out of the devic e into the pcb ground planes. these multiple ground vias are also required to achieve the specified rf perform ance.
f2972 datasheet ? 2017 integrated device technology, inc . 3 rev o april 19 , 2017 absolute maximum ratings stresses beyond those listed below may cause permanent damage to the device. functional operation of the devic e at these or any other conditions beyond those indicated in the operational sect ion of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 2. absolute maximum ratings parameter symbol minimum maximum units v cc to gnd v cc 0. 3 + 5.5 v v ctl , en v logic 0.3 lower of (v cc + 0.3, 3.9) v rf1, rf2, rfc v rf 0.3 +0.3 v maximum input cw power, 50, t ep = 25c, vcc = 5.25v (any port, insertion loss state) [a,b] 5 mhz f rf 10 mhz p abscw1 30 dbm 10 mhz < f rf 25 mhz p abscw2 32 25 mhz < f rf 200 mhz p abscw3 33 200 mhz < f rf 6000 mhz p abscw4 34 f rf > 6000 mhz p abscw5 33 maximum peak power, 50, t ep = 25c, vcc = 5.25v (any port, insertion loss state) [a, b, c] 5 mhz f rf 10 mhz p abspk1 35 dbm 10 mhz < f rf 25 mhz p abspk2 37 25 mhz < f rf 200 mhz p abspk3 38 200 mhz < f rf 6000 mhz p abspk4 39 f rf > 6000 mhz p abspk5 38 maximum junction temperature t jmax +140 c stor age temperature range t st 65 +150 c lead temperature (soldering, 10 s) t lead +260 c electros tatic discharge C hbm (jedec/esda js0012012) v esdhbm 2500 (class 2) v electros tatic discharge C cdm (jedec 22c101f) v esdcdm 1000 (class c3) v a. in a 50 s ystem , dbmv = dbm [50 ] + 47. in a 75 system, dbmv = dbm [75] + 48.75. b. t ep = temperature of the exposed paddle. c. 5% duty cycle of a 4.6ms period.
f2972 datasheet ? 2017 integrated device technology, inc . 4 rev o april 19 , 2017 recommended operating conditions table 3. recommended operating conditions parameter symbol condition minimum typical maximum units supply voltage v cc 2.5 3.3 5.25 v operating temperature range t ep exposed paddle 40 +105 c rf frequency range f rf 75 0.005 1.8 ghz 50 0.005 10 maximum operating input power p max inse rtion loss state z s = z l = 50 see figure 3 [a] dbm port impedance (rfc, rf1, rf2) z rf 75 system 75 50 system 50 a. in a 50 system , dbmv = dbm [50 ] + 47. in a 75 system , dbmv = dbm [ 75 ] + 48.75. figure 3. maximum operating rf input power (z s = z l = 50)
f2972 datasheet ? 2017 integrated device technology, inc . 5 rev o april 19 , 2017 general specifications table 4. general specifications see f2972 typical application circuit. specifications apply when operated with v cc = +3.3v, t ep = +25c, en = high, single tone signal applied at rf1 or rf2 and measured at rfc, unless otherwise noted. parameter symbol condition minimum typical maximum units logic input high threshold v ih v ctl , en pins 1.17 [b] lower of ( v cc , 3.6 ) v logic input low threshold v il v ctl , en pins 0.3 0.6 v logic current i ih , i il v ctl , en pins (each pin) -10 [a] +10 a dc current (v cc ) i cc normal operation 80 150 a standby (en = low) 20 35 switching rate sw rate 25 khz startup time t strtup from standby state, 50% en to 90% rf no change in rf path 1.0 s change in rf path 1.6 maximum video feedthrough, rfc port vid ft peak transient during switching. z s = z l = 75. measured with 20ns rise time, 0v to 3.3v (3.3v to 0v) control pulse applied to v ctl. 5 mvpp switching time [c] sw time 50% v ctl to 90% or 10% rf 1.5 3 s a. items in min/max columns in bold italics are guaranteed by t est. b. items in min/max columns that are not bold italics are guar anteed by design characterization. c. measured at f rf = 1ghz.
f2972 datasheet ? 2017 integrated device technology, inc . 6 rev o april 19 , 2017 electrical characteristics table 5. electrical characteristics 75 specification see f2972 75 application circuit. specifications apply when operated with v cc = +3.3v, t ep = +25c. z s = z l = 75, en = high, single tone signal applied at rf1 or rf2 and measured at rfc, evkit trac e and connector losses are deembedded, unless otherwis e noted. parameter symbol condition minimum typical maximum units insertion loss (rfc to rf1, rf2) il f rf = 5mhz 0.20 db 5mhz < f rf 204mhz 0.23 0.43 [b] 204mhz < f rf 1.2ghz 0.32 0.52 1.2ghz < f rf 1.8ghz 0.34 0.54 isolation (all paths) iso1 f rf = 5 mhz 77 db 5mhz < f rf 204 mhz 60 204mhz < f rf 1.2 ghz 44 1.2ghz < f rf 1.8 ghz 40 return loss (rfc, rf1, rf2) (insertion loss states) rl f rf = 5 mhz 35 db 5mhz < f rf 204 mhz 30 20 4 mhz < f rf 1 .2 ghz 17 1.2 ghz < f rf 1.8 ghz 16 2 nd harmonic h2 f in = 27 mhz p out = 20 dbm [c] 80 70 dbc f in = 204 mhz p out = 20dbm 100 90 f in = 800 mhz p out = 20dbm 120 110 3 rd harmonic h3 f in = 1 7 mhz p out = 20dbm 95 80 dbc f in = 204 mhz p out = 20dbm 120 105 f in = 800 mhz p out = 20dbm 115 100 input 0.1db compression point [d] (rfc to rf1, rf2) p0.1db f rf = 5 mhz 37 dbm f rf = 204 mhz 37 f rf = 1.8 ghz 38 composite second order cso 41 dbmv / channel 137 channels [e] >100 dbc composite triple beat ctb >100 a. items in min/max columns in bold italics are guaranteed by test. b. items in min/max columns that are not bold italics are guara nteed by design characterization. c. dbmv = dbm [75] + 48.75. d. the input 0.1db compression point is a linearity figure of me rit. refer to figure 3 for the maximum operating rf input power levels. e. total power = 7.75dbm [75] + 10*log (137) = +13.62dbm [75].
f2972 datasheet ? 2017 integrated device technology, inc . 7 rev o april 19 , 2017 electrical characteristics table 6. electrical characteristics 50 specification see f2972 50 application circuit. specifications apply when operated with v cc = +3.3v, t ep = +25c. z s = z l = 50, en = high, single tone signal applied at rf1 or rf2 and measured at rfc, evkit tra ce and connector losses are deembedded, unless otherw ise noted. parameter symbol condition minimum typical maximum units insertion loss (rfc to rf1, rf2) il f rf = 5mhz 0.25 0.45 [b] db 5mhz < f rf 1ghz 0.33 0.53 1ghz < f rf 2ghz [c] 0.36 0.56 [a] 2ghz < f rf 3ghz 0.40 3ghz < f rf 6ghz 0.45 6ghz < f rf 8ghz 0.55 8ghz < f rf 9ghz 0.65 9ghz < f rf 10ghz 0.80 isolation (rfc to rf1, rf2) iso1 5 mhz < f rf 1 ghz 43 4 8 db 1ghz < f rf 2ghz 36 42 2 ghz < f rf 3 ghz 31 3 7 3 ghz < f rf 6 ghz 2 7 6 ghz < f rf 8 ghz 22 8 ghz < f rf 10 ghz 1 8 isolation (rf1 to rf2, rf2 to rf1) iso2 5 mhz < f rf 1 ghz 40 4 5 db 1ghz < f rf 2ghz 33 38 2 ghz < f rf 3 ghz 2 9 3 4 3 ghz < f rf 6 ghz 2 6 6 ghz < f rf 8 ghz 21 8 ghz < f rf 10 ghz 1 8 return loss (rfc, rf1, rf2) (insertion loss states) rl 5 mhz < f rf 1 ghz 2 8 db 1 ghz < f rf 2 ghz 2 6 2 ghz < f rf 3 ghz 2 6 3 ghz < f rf 6 ghz 2 5 6 ghz < f rf 8 ghz 23 8 ghz < f rf 9 ghz 1 8 9 ghz < f rf 10 ghz 16 a. items in min/max columns in bold italics are guaranteed by t est. b. items in min/max columns that are not bold italics are guaran teed by design characterization. c. minimum or maximum specification guaranteed by test at 2ghz and by design characterization over the whole frequency range.
f2972 datasheet ? 2017 integrated device technology, inc . 8 rev o april 19 , 2017 electrical characteristics table 7. electrical characteristics 50 specification see f2972 50 application circuit. specifications apply when operated with v cc = +3.3v, t ep = +25c. z s = z l = 50, en = high, single tone signal applied at rf1 or rf2 and measured at rfc, evkit trac e and connector losses are deembedded, unless otherwis e noted. parameter symbol condition minimum typical maximum units input 0.1db compression [c] p0.1db f rf = 2.4ghz 40 dbm f rf = 6.0ghz 40 f rf = 8.0ghz 40 input ip3 (rf1, rf2 to rfc) iip3 f rf = 2.4ghz p in = +24dbm/tone 100mhz spacing 77 dbm input ip2 (rf1, rf2 to rfc) iip2 f 1 = 700mhz f 2 = 1.7ghz p in = +24dbm/tone measure 2.4ghz product 125 dbm f 1 = 2.4 ghz f 2 = 3.5ghz p in = +24dbm/tone measure 5.9ghz product 120 second harmonic (rf1, rf2 to rfc) h2 f in = 2.4ghz, p in = +24dbm 100 90 [b] dbc f in = 5.9ghz, p in = +24dbm 90 80 third harmonic (rf1, rf2 to rfc) h3 f in = 2.4ghz, p in = +24dbm 110 95 dbc f in = 5.9ghz, p in = +24dbm 100 85 spurious output (no rf applied) p spur1 f out 5 mhz all unused ports terminated 133 dbm p spur2 f out < 5 mhz all unused ports terminated 120 a. items in min/max columns in bold italics are guaranteed by t est. b. items in min/max columns that are not bold italics are guaran teed by design characterization. c. the input 0.1db compression point is a linearity figure of m erit. refer to figure 3 for the maximum rf operating input power levels.
f2972 datasheet ? 2017 integrated device technology, inc . 9 rev o april 19 , 2017 thermal characteristics table 8. package thermal characteristics parameter symbol value units junction to ambie nt thermal resistance ja 102 c/w junction to case thermal resist ance (case is defined as the exposed paddle) jc_bot 56 c/w moisture sensitivity rating (per j std 020) msl 1 typical operating conditions (tocs) unless otherwise noted: v cc = +3.3v en = high z l = z s = 75 z l = z s = 50 all temperatures are referenced to the exposed paddle evaluation kit traces and connector losses are deembedd ed
f2972 datasheet ? 2017 integrated device technology, inc . 10 rev o april 19 , 2017 typical performance characteristics 75 performan ce figure 4. rf1 to rfc insertion loss figure 5. rf2 to rf c insertion loss figure 6. rf1 to rfc isolation [rf2 on state] figure 7. rf2 to rfc isolation [rf1 on state] figure 8. rf1 to rf2 isolation [rf1 on state] figure 9. rf1 to rf2 isolation [rf2 on state] -0.50 -0.45 -0.40 -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0.00 0.0 0.5 1.0 1.5 2.0 2.5 3.0 insertion loss (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -0.50 -0.45 -0.40 -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0.00 0.0 0.5 1.0 1.5 2.0 2.5 3.0 insertion loss (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 isolation (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 isolation (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 isolation (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 isolation (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v
f2972 datasheet ? 2017 integrated device technology, inc . 11 rev o april 19 , 2017 typical performance characteristics 75 performan ce figure 10. rfc return loss [rf1 on state] figure 11. rfc return loss [rf2 on state] figure 12. rf1 return loss [rf1 on state] figure 13. rf2 return loss [rf2 on state] -40 -35 -30 -25 -20 -15 -10 -5 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 match (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -40 -35 -30 -25 -20 -15 -10 -5 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 match (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -40 -35 -30 -25 -20 -15 -10 -5 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 match (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -40 -35 -30 -25 -20 -15 -10 -5 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 match (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v
f2972 datasheet ? 2017 integrated device technology, inc . 12 rev o april 19 , 2017 typical performance characteristics 50 performan ce figure 14. rf1 to rfc insertion loss figure 15. rf2 to rfc insertion loss figure 16. rf1 to rfc isolation [rf2 on state] figure 17 . rf2 to rfc isolation [rf1 on state] figure 18. rf1 to rf2 isolation [rf1 on state] figure 19 . rf1 to rf2 isolation [rf2 on state] -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 0 1 2 3 4 5 6 7 8 9 10 insertion loss (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 0 1 2 3 4 5 6 7 8 9 10 insertion loss (db) frequency (ghz) -40c / 2.5v -40c / 3.3v -40c / 5.25v 25c / 2.5v 25c / 3.3v 25c / 5.25v 105c / 2.5v 105c / 3.3v 105c / 5.25v -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0 1 2 3 4 5 6 7 8 9 10 isolation (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0 1 2 3 4 5 6 7 8 9 10 isolation (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0 1 2 3 4 5 6 7 8 9 10 isolation (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0 1 2 3 4 5 6 7 8 9 10 isolation (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v
f2972 datasheet ? 2017 integrated device technology, inc . 13 rev o april 19 , 2017 typical performance characteristics 50 performan ce figure 20. rfc return loss [rf1 on state] figure 21. rfc return loss [rf2 on state] figure 22. rf1 return loss [rf1 on state] figure 23. rf2 return loss [rf2 on state] figure 24. switching time [isolation to insertion loss state] figure 25. switching time [insertion loss to isolation state] -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 0 1 2 3 4 5 6 7 8 9 10 match (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 0 1 2 3 4 5 6 7 8 9 10 match (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 0 1 2 3 4 5 6 7 8 9 10 match (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 0 1 2 3 4 5 6 7 8 9 10 match (db) frequency (ghz) -40 c / 2.5 v -40 c / 3.3 v -40 c / 5.25 v 25 c / 2.5 v 25 c / 3.3 v 25 c / 5.25 v 105 c / 2.5 v 105 c / 3.3 v 105 c / 5.25 v
f2972 datasheet ? 2017 integrated device technology, inc . 14 rev o april 19 , 2017 control mode table 9. switch control truth table v ctl (pin 7) en (pin 8) switch state low high rfc to rf1 insertion loss state high high rfc to rf2 insertion loss state dont care low standby application information power supplies a common v cc power supply should be used for all pins requiring dc pow er. all supply pins should be bypassed with external capac itors to minimize noise and fast transients. supply noise can degrad e noise figure and fast transients can trigger esd clamps and cause them to fail. supply voltage change or transients should have a slew rate smaller than 1v / 20s. in addition, all control pins should remain at 0v (+/0.3v) while the supply voltage ramps up or while it returns to ze ro. control pin interface if control signal integrity is a concern and clean signals c annot be guaranteed due to overshoot, undershoot, r inging, etc., the following circuit at the input of each control pin is recommended. this appli es to control pins 7 and 8 as shown below. figure 26. control pin interface schematic gnd v cc rf2 gnd rf1 gnd f2972 gnd rfc gnd gnd 12 3 4 5 6 98 7 12 11 10 ep en v ctl 5k 5k 2 pf 2 pf
f2972 datasheet ? 2017 integrated device technology, inc . 15 rev o april 19 , 2017 75 evaluation kit picture figure 27. top view (75) figure 28. bottom view (75)
f2972 datasheet ? 2017 integrated device technology, inc . 16 rev o april 19 , 2017 50 evaluation kit picture figure 29. top view (50) figure 30. bottom view (50)
f2972 datasheet ? 2017 integrated device technology, inc . 17 rev o april 19 , 2017 75 evaluation kit / applications circuit figure 31. electrical schematic (75)
f2972 datasheet ? 2017 integrated device technology, inc . 18 rev o april 19 , 2017 50 evaluation kit / applications circuit figure 32. electrical schematic (50)
f2972 datasheet ? 2017 integrated device technology, inc . 19 rev o april 19 , 2017 table 10. 75 bill of material (bom) part reference qty description manufacturer part # manufacturer c1 1 0.1f 10%, 16 v, x7r, ceramic capacitor (0402) grm155r71c104ka88d murata c 2, c4 2 100pf 5% 50 v, c0g, ceramic capacitor (0402) grm1555c1h101ja01d murata c3 1 0.01f 5% 50 v, x7r, ceramic capacitor (0603) grm188r71h103ja01d murata r2, r3 2 100 1/10 w, resistor (0402) erj 2rkf1000x panasonic j1 C j5 5 f type edge mount 222181 a mphenol rf j6 1 conn header vert 5x1 pos gold 68002 205hlf amphenol fci u1 1 sp2t switch 2mm x 2mm 12 pin tqfn f2972negk idt 1 printed circuit board f2972 75 pcb idt table 11. 50 bill of material (bom) part reference qty description manufacturer part # manufacturer c1 C c7 0 not installed (0402) r1 C r3 3 0 1/10 w, resistor (0402) erj 2ge0r 00x panasonic j1 C j5 5 sma edge mount 142 0761 881 cinch connectivity j6 1 conn header 10 pos 0.100 str 15 a u 68602 210 hlf amphe nol fci tp1, tp2, tp3, tp4, tp5 0 not installed test point loop u1 1 sp2t switch 2mm x 2mm 12 pin t qfn f2972negk idt 1 printed circuit board f2972 50 pcb idt
f2972 datasheet ? 2017 integrated device technology, inc . 20 rev o april 19 , 2017 evaluation kit (evkit) operation external supply setup set up a v cc power supply in the voltage range of 2.5v to 5.25v wit h the power supply output disabled. for the 75 evkit, connect the disabled vcc supply conne ction to j6 pin 2 and gnd to j6 pins 1 or 5. for the 50 evkit, connect the disabled vcc supply conne ction to j6 pin 3 and gnd to j6 pin 1, 2, 4, 6, 8, 9 , or 10. logic control setup with the logic control lines disabled set the high and low logic levels to satisfy the levels stated in the electrical sp ecifications table. for the 75 evkit, connect the disabled logic control lines to j6 en (pin 3) and v ctl (pin 4). for the 50 evkit, connect the disabled logic control lines to j6 en / ls (pin 5) and v ctl (pin 7). see table 9 for the logic truth table. turn on procedure setup the supplies and evkit as noted in the external su pply setup and logic control setup sections above. enable the v cc supply. enable the logic control signals. set the logic setting to achieve the desired table 9 con figuration. note that external control logic should not b e applied without v cc being present. turn off procedure set the logic control pins to a logic low. disable the v cc supply.
f2972 datasheet ? 2017 integrated device technology, inc . 21 rev o april 19 , 2017 package drawings figure 33. package outline drawing neg12 psc4642
f2972 datasheet ? 2017 integrated device technology, inc . 22 rev o april 19 , 2017 recommended land pattern figure 34. recommended land pattern neg12 psc4642
f2972 datasheet ? 2017 integrated device technology, inc . 23 rev o april 19 , 2017 marking diagram 2972 yw** line 1 2972 = abbreviated part number. line 2 y = year code. line 2 w = work week code. line 2 ** = sequential alpha for lot traceability. ordering information orderable part number package msl rating shipping packaging temperature f2 9 72negk 2 mm x 2 mm x 0.5 mm 12 vfqfp n msl1 cut reel 40c to +105 c f2972negk8 2 mm x 2 mm x 0. 5 mm 1 2 vfqfp n msl1 tape and reel 40c to +105 c f2972evbi 75ohm 75 evaluation board f2972evbi 50ohm 50 evaluation board
corporate headquarters 6024 silver creek valley road san jose, ca 95138 www.idt.com sales 18003457015 or 4082848200 fax: 4082842775 www.idt.com/go/sales tech support www.idt.com/go/support disclaimer integrated device technology, inc. (idt) and its affiliated companies (herein referred to a s idt) reserve the right to modify the products a nd/or specifications described herein at any time, without notice, at idt's sole discretion. performance specifications and ope rating parameters of the described products are det ermined in an independent state and are not guarant eed to perform the same way when installed in custo mer products. the information contained herein is provided withou t representation or warranty of any kind, whether e xpress or implied, including, but not limited to, t he suitability of idt's products for any particular purpose, an implied warranty of merchantability, or noninfringement of the inte llectual property rights of others. this document i s presented only as a guide and does not convey any license under intellectual property rights of idt or any third parties. idt's products are not intended for use in applicat ions involving extreme environmental conditions or in life support systems or similar devices where th e failure or malfunction of an idt product can be r easonably expected to significantly affect the health or safety of users. anyone using an idt product in such a manner does so at their own risk, absent an express, written ag reement by idt. integrated device technology, idt and the idt logo are trademarks or registered trademarks of idt and its subsidiaries in the united states and other cou ntries. other trademarks used herein are the proper ty of idt or their respective third party owners. for datasheet type d efinitions and a glossary of common terms, visit www.idt.com/go/glossary . all contents of this document are copyright of in tegrated device technology, inc. all rights reserve d f2972 datasheet ? 2017 integrated device technology, inc. 24 rev o april 19 , 2017 revision history revision revision date description of change rev o 2017 apr 19 initial release

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